diff options
Diffstat (limited to 'include/arch/x86_64/asm')
| -rw-r--r-- | include/arch/x86_64/asm/a.out.h | 12 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/amd_hsmp.h | 679 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/atomic.h | 30 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/bootparam.h | 8 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/elf.h | 3 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/kvm.h | 20 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/processor-flags.h | 12 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/sgx.h | 31 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/svm.h | 150 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/swab.h | 4 | ||||
| -rw-r--r-- | include/arch/x86_64/asm/vmx.h | 97 |
11 files changed, 467 insertions, 579 deletions
diff --git a/include/arch/x86_64/asm/a.out.h b/include/arch/x86_64/asm/a.out.h index 5df47aa2..8238fca4 100644 --- a/include/arch/x86_64/asm/a.out.h +++ b/include/arch/x86_64/asm/a.out.h @@ -6,12 +6,12 @@ struct exec { unsigned int a_info; /* Use macros N_MAGIC, etc for access */ unsigned a_text; /* length of text, in bytes */ unsigned a_data; /* length of data, in bytes */ - unsigned a_bss; /* length of uninitialized data area for file, in bytes - */ - unsigned a_syms; /* length of symbol table data in file, in bytes */ - unsigned a_entry; /* start address */ - unsigned a_trsize; /* length of relocation info for text, in bytes */ - unsigned a_drsize; /* length of relocation info for data, in bytes */ + unsigned a_bss; /* length of uninitialized data area for file, in bytes + */ + unsigned a_syms; /* length of symbol table data in file, in bytes */ + unsigned a_entry; /* start address */ + unsigned a_trsize; /* length of relocation info for text, in bytes */ + unsigned a_drsize; /* length of relocation info for data, in bytes */ }; #define N_TRSIZE(a) ((a).a_trsize) diff --git a/include/arch/x86_64/asm/amd_hsmp.h b/include/arch/x86_64/asm/amd_hsmp.h index 8f1d8340..abe444a5 100644 --- a/include/arch/x86_64/asm/amd_hsmp.h +++ b/include/arch/x86_64/asm/amd_hsmp.h @@ -13,51 +13,51 @@ * HSMP Messages supported */ enum hsmp_message_ids { - HSMP_TEST = 1, /* 01h Increments input value by 1 */ - HSMP_GET_SMU_VER, /* 02h SMU FW version */ - HSMP_GET_PROTO_VER, /* 03h HSMP interface version */ - HSMP_GET_SOCKET_POWER, /* 04h average package power consumption */ - HSMP_SET_SOCKET_POWER_LIMIT, /* 05h Set the socket power limit */ - HSMP_GET_SOCKET_POWER_LIMIT, /* 06h Get current socket power limit */ + HSMP_TEST = 1, /* 01h Increments input value by 1 */ + HSMP_GET_SMU_VER, /* 02h SMU FW version */ + HSMP_GET_PROTO_VER, /* 03h HSMP interface version */ + HSMP_GET_SOCKET_POWER, /* 04h average package power consumption */ + HSMP_SET_SOCKET_POWER_LIMIT, /* 05h Set the socket power limit */ + HSMP_GET_SOCKET_POWER_LIMIT, /* 06h Get current socket power limit */ HSMP_GET_SOCKET_POWER_LIMIT_MAX, /* 07h Get maximum socket power value */ - HSMP_SET_BOOST_LIMIT, /* 08h Set a core maximum frequency limit */ - HSMP_SET_BOOST_LIMIT_SOCKET, /* 09h Set socket maximum frequency level - */ - HSMP_GET_BOOST_LIMIT, /* 0Ah Get current frequency limit */ - HSMP_GET_PROC_HOT, /* 0Bh Get PROCHOT status */ - HSMP_SET_XGMI_LINK_WIDTH, /* 0Ch Set max and min width of xGMI Link */ - HSMP_SET_DF_PSTATE, /* 0Dh Alter APEnable/Disable messages behavior */ - HSMP_SET_AUTO_DF_PSTATE, /* 0Eh Enable DF P-State Performance Boost - algorithm */ - HSMP_GET_FCLK_MCLK, /* 0Fh Get FCLK and MEMCLK for current socket */ - HSMP_GET_CCLK_THROTTLE_LIMIT, /* 10h Get CCLK frequency limit in socket - */ - HSMP_GET_C0_PERCENT, /* 11h Get average C0 residency in socket */ - HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given - NBIO */ - HSMP_GET_NBIO_DPM_LEVEL, /* 13h Get LCLK DPM level min and max for a - given NBIO */ - HSMP_GET_DDR_BANDWIDTH, /* 14h Get theoretical maximum and current DDR - Bandwidth */ - HSMP_GET_TEMP_MONITOR, /* 15h Get socket temperature */ - HSMP_GET_DIMM_TEMP_RANGE, /* 16h Get per-DIMM temperature range and - refresh rate */ - HSMP_GET_DIMM_POWER, /* 17h Get per-DIMM power consumption */ - HSMP_GET_DIMM_THERMAL, /* 18h Get per-DIMM thermal sensors */ - HSMP_GET_SOCKET_FREQ_LIMIT, /* 19h Get current active frequency per - socket */ - HSMP_GET_CCLK_CORE_LIMIT, /* 1Ah Get CCLK frequency limit per core */ - HSMP_GET_RAILS_SVI, /* 1Bh Get SVI-based Telemetry for all rails */ - HSMP_GET_SOCKET_FMAX_FMIN, /* 1Ch Get Fmax and Fmin per socket */ - HSMP_GET_IOLINK_BANDWITH, /* 1Dh Get current bandwidth on IO Link */ - HSMP_GET_XGMI_BANDWITH, /* 1Eh Get current bandwidth on xGMI Link */ - HSMP_SET_GMI3_WIDTH, /* 1Fh Set max and min GMI3 Link width */ - HSMP_SET_PCI_RATE, /* 20h Control link rate on PCIe devices */ - HSMP_SET_POWER_MODE, /* 21h Select power efficiency profile policy */ - HSMP_SET_PSTATE_MAX_MIN, /* 22h Set the max and min DF P-State */ - HSMP_GET_METRIC_TABLE_VER, /* 23h Get metrics table version */ - HSMP_GET_METRIC_TABLE, /* 24h Get metrics table */ + HSMP_SET_BOOST_LIMIT, /* 08h Set a core maximum frequency limit */ + HSMP_SET_BOOST_LIMIT_SOCKET, /* 09h Set socket maximum frequency level + */ + HSMP_GET_BOOST_LIMIT, /* 0Ah Get current frequency limit */ + HSMP_GET_PROC_HOT, /* 0Bh Get PROCHOT status */ + HSMP_SET_XGMI_LINK_WIDTH, /* 0Ch Set max and min width of xGMI Link */ + HSMP_SET_DF_PSTATE, /* 0Dh Alter APEnable/Disable messages behavior */ + HSMP_SET_AUTO_DF_PSTATE, /* 0Eh Enable DF P-State Performance Boost + algorithm */ + HSMP_GET_FCLK_MCLK, /* 0Fh Get FCLK and MEMCLK for current socket */ + HSMP_GET_CCLK_THROTTLE_LIMIT, /* 10h Get CCLK frequency limit in socket + */ + HSMP_GET_C0_PERCENT, /* 11h Get average C0 residency in socket */ + HSMP_SET_NBIO_DPM_LEVEL, /* 12h Set max/min LCLK DPM Level for a given + NBIO */ + HSMP_GET_NBIO_DPM_LEVEL, /* 13h Get LCLK DPM level min and max for a + given NBIO */ + HSMP_GET_DDR_BANDWIDTH, /* 14h Get theoretical maximum and current DDR + Bandwidth */ + HSMP_GET_TEMP_MONITOR, /* 15h Get socket temperature */ + HSMP_GET_DIMM_TEMP_RANGE, /* 16h Get per-DIMM temperature range and + refresh rate */ + HSMP_GET_DIMM_POWER, /* 17h Get per-DIMM power consumption */ + HSMP_GET_DIMM_THERMAL, /* 18h Get per-DIMM thermal sensors */ + HSMP_GET_SOCKET_FREQ_LIMIT, /* 19h Get current active frequency per + socket */ + HSMP_GET_CCLK_CORE_LIMIT, /* 1Ah Get CCLK frequency limit per core */ + HSMP_GET_RAILS_SVI, /* 1Bh Get SVI-based Telemetry for all rails */ + HSMP_GET_SOCKET_FMAX_FMIN, /* 1Ch Get Fmax and Fmin per socket */ + HSMP_GET_IOLINK_BANDWITH, /* 1Dh Get current bandwidth on IO Link */ + HSMP_GET_XGMI_BANDWITH, /* 1Eh Get current bandwidth on xGMI Link */ + HSMP_SET_GMI3_WIDTH, /* 1Fh Set max and min GMI3 Link width */ + HSMP_SET_PCI_RATE, /* 20h Control link rate on PCIe devices */ + HSMP_SET_POWER_MODE, /* 21h Select power efficiency profile policy */ + HSMP_SET_PSTATE_MAX_MIN, /* 22h Set the max and min DF P-State */ + HSMP_GET_METRIC_TABLE_VER, /* 23h Get metrics table version */ + HSMP_GET_METRIC_TABLE, /* 24h Get metrics table */ HSMP_GET_METRIC_TABLE_DRAM_ADDR, /* 25h Get metrics table dram address */ HSMP_SET_XGMI_PSTATE_RANGE, /* 26h Set xGMI P-state range */ @@ -72,9 +72,9 @@ enum hsmp_message_ids { }; struct hsmp_message { - __u32 msg_id; /* Message ID */ - __u16 num_args; /* Number of input argument words in message */ - __u16 response_sz; /* Number of expected output/response words */ + __u32 msg_id; /* Message ID */ + __u16 num_args; /* Number of input argument words in message */ + __u16 response_sz; /* Number of expected output/response words */ __u32 args[HSMP_MAX_MSG_LEN]; /* argument/response buffer */ __u16 sock_ind; /* socket number */ }; @@ -108,300 +108,299 @@ struct hsmp_msg_desc { * * Not supported messages would return -ENOMSG. */ -static const struct hsmp_msg_desc hsmp_msg_desc_table[] - __attribute__((unused)) = { - /* RESERVED */ - { 0, 0, HSMP_RSVD }, - - /* - * HSMP_TEST, num_args = 1, response_sz = 1 - * input: args[0] = xx - * output: args[0] = xx + 1 - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_SMU_VER, num_args = 0, response_sz = 1 - * output: args[0] = smu fw ver - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_PROTO_VER, num_args = 0, response_sz = 1 - * output: args[0] = proto version - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_SOCKET_POWER, num_args = 0, response_sz = 1 - * output: args[0] = socket power in mWatts - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_SET_SOCKET_POWER_LIMIT, num_args = 1, response_sz = 0 - * input: args[0] = power limit value in mWatts - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_GET_SOCKET_POWER_LIMIT, num_args = 0, response_sz = 1 - * output: args[0] = socket power limit value in mWatts - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args = 0, response_sz = - * 1 output: args[0] = maximuam socket power limit in mWatts - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_SET_BOOST_LIMIT, num_args = 1, response_sz = 0 - * input: args[0] = apic id[31:16] + boost limit value in - * MHz[15:0] - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_SET_BOOST_LIMIT_SOCKET, num_args = 1, response_sz = 0 - * input: args[0] = boost limit value in MHz - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_GET_BOOST_LIMIT, num_args = 1, response_sz = 1 - * input: args[0] = apic id - * output: args[0] = boost limit value in MHz - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_PROC_HOT, num_args = 0, response_sz = 1 - * output: args[0] = proc hot status - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_SET_XGMI_LINK_WIDTH, num_args = 1, response_sz = 0 - * input: args[0] = min link width[15:8] + max link width[7:0] - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_SET_DF_PSTATE, num_args = 1, response_sz = 0 - * input: args[0] = df pstate[7:0] - */ - { 1, 0, HSMP_SET }, - - /* HSMP_SET_AUTO_DF_PSTATE, num_args = 0, response_sz = 0 */ - { 0, 0, HSMP_SET }, - - /* - * HSMP_GET_FCLK_MCLK, num_args = 0, response_sz = 2 - * output: args[0] = fclk in MHz, args[1] = mclk in MHz - */ - { 0, 2, HSMP_GET }, - - /* - * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args = 0, response_sz = 1 - * output: args[0] = core clock in MHz - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_C0_PERCENT, num_args = 0, response_sz = 1 - * output: args[0] = average c0 residency - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_SET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 0 - * input: args[0] = nbioid[23:16] + max dpm level[15:8] + min - * dpm level[7:0] - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_GET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 1 - * input: args[0] = nbioid[23:16] - * output: args[0] = max dpm level[15:8] + min dpm level[7:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_DDR_BANDWIDTH, num_args = 0, response_sz = 1 - * output: args[0] = max bw in Gbps[31:20] + utilised bw in - * Gbps[19:8] + bw in percentage[7:0] - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_TEMP_MONITOR, num_args = 0, response_sz = 1 - * output: args[0] = temperature in degree celsius. [15:8] - * integer part + [7:5] fractional part - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_DIMM_TEMP_RANGE, num_args = 1, response_sz = 1 - * input: args[0] = DIMM address[7:0] - * output: args[0] = refresh rate[3] + temperature range[2:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_DIMM_POWER, num_args = 1, response_sz = 1 - * input: args[0] = DIMM address[7:0] - * output: args[0] = DIMM power in mW[31:17] + update rate in - * ms[16:8] + DIMM address[7:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_DIMM_THERMAL, num_args = 1, response_sz = 1 - * input: args[0] = DIMM address[7:0] - * output: args[0] = temperature in degree celsius[31:21] + - * update rate in ms[16:8] + DIMM address[7:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_SOCKET_FREQ_LIMIT, num_args = 0, response_sz = 1 - * output: args[0] = frequency in MHz[31:16] + frequency - * source[15:0] - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_CCLK_CORE_LIMIT, num_args = 1, response_sz = 1 - * input: args[0] = apic id [31:0] - * output: args[0] = frequency in MHz[31:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_RAILS_SVI, num_args = 0, response_sz = 1 - * output: args[0] = power in mW[31:0] - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_SOCKET_FMAX_FMIN, num_args = 0, response_sz = 1 - * output: args[0] = fmax in MHz[31:16] + fmin in MHz[15:0] - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_IOLINK_BANDWITH, num_args = 1, response_sz = 1 - * input: args[0] = link id[15:8] + bw type[2:0] - * output: args[0] = io bandwidth in Mbps[31:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_GET_XGMI_BANDWITH, num_args = 1, response_sz = 1 - * input: args[0] = link id[15:8] + bw type[2:0] - * output: args[0] = xgmi bandwidth in Mbps[31:0] - */ - { 1, 1, HSMP_GET }, - - /* - * HSMP_SET_GMI3_WIDTH, num_args = 1, response_sz = 0 - * input: args[0] = min link width[15:8] + max link width[7:0] - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_SET_PCI_RATE, num_args = 1, response_sz = 1 - * input: args[0] = link rate control value - * output: args[0] = previous link rate control value - */ - { 1, 1, HSMP_SET }, - - /* - * HSMP_SET_POWER_MODE, num_args = 1, response_sz = 0 - * input: args[0] = power efficiency mode[2:0] - */ - { 1, 1, HSMP_SET_GET }, - - /* - * HSMP_SET_PSTATE_MAX_MIN, num_args = 1, response_sz = 0 - * input: args[0] = min df pstate[15:8] + max df pstate[7:0] - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_GET_METRIC_TABLE_VER, num_args = 0, response_sz = 1 - * output: args[0] = metrics table version - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_METRIC_TABLE, num_args = 0, response_sz = 0 - */ - { 0, 0, HSMP_GET }, - - /* - * HSMP_GET_METRIC_TABLE_DRAM_ADDR, num_args = 0, response_sz = - * 2 output: args[0] = lower 32 bits of the address output: - * args[1] = upper 32 bits of the address - */ - { 0, 2, HSMP_GET }, - - /* - * HSMP_SET_XGMI_PSTATE_RANGE, num_args = 1, response_sz = 0 - * input: args[0] = min xGMI p-state[15:8] + max xGMI - * p-state[7:0] - */ - { 1, 0, HSMP_SET }, - - /* - * HSMP_CPU_RAIL_ISO_FREQ_POLICY, num_args = 1, response_sz = 1 - * input: args[0] = set/get policy[31] + - * disable/enable independent control[0] - * output: args[0] = current policy[0] - */ - { 1, 1, HSMP_SET_GET }, - - /* - * HSMP_DFC_ENABLE_CTRL, num_args = 1, response_sz = 1 - * input: args[0] = set/get policy[31] + enable/disable DFC[0] - * output: args[0] = current policy[0] - */ - { 1, 1, HSMP_SET_GET }, - - /* RESERVED(0x29-0x2f) */ - { 0, 0, HSMP_RSVD }, - { 0, 0, HSMP_RSVD }, - { 0, 0, HSMP_RSVD }, - { 0, 0, HSMP_RSVD }, - { 0, 0, HSMP_RSVD }, - { 0, 0, HSMP_RSVD }, - { 0, 0, HSMP_RSVD }, - - /* - * HSMP_GET_RAPL_UNITS, response_sz = 1 - * output: args[0] = tu value[19:16] + esu value[12:8] - */ - { 0, 1, HSMP_GET }, - - /* - * HSMP_GET_RAPL_CORE_COUNTER, num_args = 1, response_sz = 1 - * input: args[0] = apic id[15:0] - * output: args[0] = lower 32 bits of energy - * output: args[1] = upper 32 bits of energy - */ - { 1, 2, HSMP_GET }, - - /* - * HSMP_GET_RAPL_PACKAGE_COUNTER, num_args = 0, response_sz = 1 - * output: args[0] = lower 32 bits of energy - * output: args[1] = upper 32 bits of energy - */ - { 0, 2, HSMP_GET }, - - }; +static const struct hsmp_msg_desc hsmp_msg_desc_table[] __attribute__((unused)) = { + /* RESERVED */ + { 0, 0, HSMP_RSVD }, + + /* + * HSMP_TEST, num_args = 1, response_sz = 1 + * input: args[0] = xx + * output: args[0] = xx + 1 + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_SMU_VER, num_args = 0, response_sz = 1 + * output: args[0] = smu fw ver + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_PROTO_VER, num_args = 0, response_sz = 1 + * output: args[0] = proto version + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_SOCKET_POWER, num_args = 0, response_sz = 1 + * output: args[0] = socket power in mWatts + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_SET_SOCKET_POWER_LIMIT, num_args = 1, response_sz = 0 + * input: args[0] = power limit value in mWatts + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_GET_SOCKET_POWER_LIMIT, num_args = 0, response_sz = 1 + * output: args[0] = socket power limit value in mWatts + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_SOCKET_POWER_LIMIT_MAX, num_args = 0, response_sz = + * 1 output: args[0] = maximuam socket power limit in mWatts + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_SET_BOOST_LIMIT, num_args = 1, response_sz = 0 + * input: args[0] = apic id[31:16] + boost limit value in + * MHz[15:0] + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_SET_BOOST_LIMIT_SOCKET, num_args = 1, response_sz = 0 + * input: args[0] = boost limit value in MHz + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_GET_BOOST_LIMIT, num_args = 1, response_sz = 1 + * input: args[0] = apic id + * output: args[0] = boost limit value in MHz + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_PROC_HOT, num_args = 0, response_sz = 1 + * output: args[0] = proc hot status + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_SET_XGMI_LINK_WIDTH, num_args = 1, response_sz = 0 + * input: args[0] = min link width[15:8] + max link width[7:0] + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_SET_DF_PSTATE, num_args = 1, response_sz = 0 + * input: args[0] = df pstate[7:0] + */ + { 1, 0, HSMP_SET }, + + /* HSMP_SET_AUTO_DF_PSTATE, num_args = 0, response_sz = 0 */ + { 0, 0, HSMP_SET }, + + /* + * HSMP_GET_FCLK_MCLK, num_args = 0, response_sz = 2 + * output: args[0] = fclk in MHz, args[1] = mclk in MHz + */ + { 0, 2, HSMP_GET }, + + /* + * HSMP_GET_CCLK_THROTTLE_LIMIT, num_args = 0, response_sz = 1 + * output: args[0] = core clock in MHz + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_C0_PERCENT, num_args = 0, response_sz = 1 + * output: args[0] = average c0 residency + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_SET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 0 + * input: args[0] = nbioid[23:16] + max dpm level[15:8] + min + * dpm level[7:0] + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_GET_NBIO_DPM_LEVEL, num_args = 1, response_sz = 1 + * input: args[0] = nbioid[23:16] + * output: args[0] = max dpm level[15:8] + min dpm level[7:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_DDR_BANDWIDTH, num_args = 0, response_sz = 1 + * output: args[0] = max bw in Gbps[31:20] + utilised bw in + * Gbps[19:8] + bw in percentage[7:0] + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_TEMP_MONITOR, num_args = 0, response_sz = 1 + * output: args[0] = temperature in degree celsius. [15:8] + * integer part + [7:5] fractional part + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_DIMM_TEMP_RANGE, num_args = 1, response_sz = 1 + * input: args[0] = DIMM address[7:0] + * output: args[0] = refresh rate[3] + temperature range[2:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_DIMM_POWER, num_args = 1, response_sz = 1 + * input: args[0] = DIMM address[7:0] + * output: args[0] = DIMM power in mW[31:17] + update rate in + * ms[16:8] + DIMM address[7:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_DIMM_THERMAL, num_args = 1, response_sz = 1 + * input: args[0] = DIMM address[7:0] + * output: args[0] = temperature in degree celsius[31:21] + + * update rate in ms[16:8] + DIMM address[7:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_SOCKET_FREQ_LIMIT, num_args = 0, response_sz = 1 + * output: args[0] = frequency in MHz[31:16] + frequency + * source[15:0] + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_CCLK_CORE_LIMIT, num_args = 1, response_sz = 1 + * input: args[0] = apic id [31:0] + * output: args[0] = frequency in MHz[31:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_RAILS_SVI, num_args = 0, response_sz = 1 + * output: args[0] = power in mW[31:0] + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_SOCKET_FMAX_FMIN, num_args = 0, response_sz = 1 + * output: args[0] = fmax in MHz[31:16] + fmin in MHz[15:0] + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_IOLINK_BANDWITH, num_args = 1, response_sz = 1 + * input: args[0] = link id[15:8] + bw type[2:0] + * output: args[0] = io bandwidth in Mbps[31:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_GET_XGMI_BANDWITH, num_args = 1, response_sz = 1 + * input: args[0] = link id[15:8] + bw type[2:0] + * output: args[0] = xgmi bandwidth in Mbps[31:0] + */ + { 1, 1, HSMP_GET }, + + /* + * HSMP_SET_GMI3_WIDTH, num_args = 1, response_sz = 0 + * input: args[0] = min link width[15:8] + max link width[7:0] + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_SET_PCI_RATE, num_args = 1, response_sz = 1 + * input: args[0] = link rate control value + * output: args[0] = previous link rate control value + */ + { 1, 1, HSMP_SET }, + + /* + * HSMP_SET_POWER_MODE, num_args = 1, response_sz = 0 + * input: args[0] = power efficiency mode[2:0] + */ + { 1, 1, HSMP_SET_GET }, + + /* + * HSMP_SET_PSTATE_MAX_MIN, num_args = 1, response_sz = 0 + * input: args[0] = min df pstate[15:8] + max df pstate[7:0] + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_GET_METRIC_TABLE_VER, num_args = 0, response_sz = 1 + * output: args[0] = metrics table version + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_METRIC_TABLE, num_args = 0, response_sz = 0 + */ + { 0, 0, HSMP_GET }, + + /* + * HSMP_GET_METRIC_TABLE_DRAM_ADDR, num_args = 0, response_sz = + * 2 output: args[0] = lower 32 bits of the address output: + * args[1] = upper 32 bits of the address + */ + { 0, 2, HSMP_GET }, + + /* + * HSMP_SET_XGMI_PSTATE_RANGE, num_args = 1, response_sz = 0 + * input: args[0] = min xGMI p-state[15:8] + max xGMI + * p-state[7:0] + */ + { 1, 0, HSMP_SET }, + + /* + * HSMP_CPU_RAIL_ISO_FREQ_POLICY, num_args = 1, response_sz = 1 + * input: args[0] = set/get policy[31] + + * disable/enable independent control[0] + * output: args[0] = current policy[0] + */ + { 1, 1, HSMP_SET_GET }, + + /* + * HSMP_DFC_ENABLE_CTRL, num_args = 1, response_sz = 1 + * input: args[0] = set/get policy[31] + enable/disable DFC[0] + * output: args[0] = current policy[0] + */ + { 1, 1, HSMP_SET_GET }, + + /* RESERVED(0x29-0x2f) */ + { 0, 0, HSMP_RSVD }, + { 0, 0, HSMP_RSVD }, + { 0, 0, HSMP_RSVD }, + { 0, 0, HSMP_RSVD }, + { 0, 0, HSMP_RSVD }, + { 0, 0, HSMP_RSVD }, + { 0, 0, HSMP_RSVD }, + + /* + * HSMP_GET_RAPL_UNITS, response_sz = 1 + * output: args[0] = tu value[19:16] + esu value[12:8] + */ + { 0, 1, HSMP_GET }, + + /* + * HSMP_GET_RAPL_CORE_COUNTER, num_args = 1, response_sz = 1 + * input: args[0] = apic id[15:0] + * output: args[0] = lower 32 bits of energy + * output: args[1] = upper 32 bits of energy + */ + { 1, 2, HSMP_GET }, + + /* + * HSMP_GET_RAPL_PACKAGE_COUNTER, num_args = 0, response_sz = 1 + * output: args[0] = lower 32 bits of energy + * output: args[1] = upper 32 bits of energy + */ + { 0, 2, HSMP_GET }, + +}; /* Metrics table (supported only with proto version 6) */ struct hsmp_metric_table { diff --git a/include/arch/x86_64/asm/atomic.h b/include/arch/x86_64/asm/atomic.h index b673c7e3..9b2a4fd3 100644 --- a/include/arch/x86_64/asm/atomic.h +++ b/include/arch/x86_64/asm/atomic.h @@ -3,50 +3,35 @@ #define a_cas a_cas static inline int a_cas(volatile int *p, int t, int s) { - __asm__ __volatile__("lock ; cmpxchg %3, %1" - : "=a"(t), "=m"(*p) - : "a"(t), "r"(s) - : "memory"); + __asm__ __volatile__("lock ; cmpxchg %3, %1" : "=a"(t), "=m"(*p) : "a"(t), "r"(s) : "memory"); return t; } #define a_cas_p a_cas_p static inline void *a_cas_p(volatile void *p, void *t, void *s) { - __asm__("lock ; cmpxchg %3, %1" - : "=a"(t), "=m"(*(void *volatile *)p) - : "a"(t), "r"(s) - : "memory"); + __asm__("lock ; cmpxchg %3, %1" : "=a"(t), "=m"(*(void *volatile *)p) : "a"(t), "r"(s) : "memory"); return t; } #define a_swap a_swap static inline int a_swap(volatile int *p, int v) { - __asm__ __volatile__("xchg %0, %1" - : "=r"(v), "=m"(*p) - : "0"(v) - : "memory"); + __asm__ __volatile__("xchg %0, %1" : "=r"(v), "=m"(*p) : "0"(v) : "memory"); return v; } #define a_fetch_add a_fetch_add static inline int a_fetch_add(volatile int *p, int v) { - __asm__ __volatile__("lock ; xadd %0, %1" - : "=r"(v), "=m"(*p) - : "0"(v) - : "memory"); + __asm__ __volatile__("lock ; xadd %0, %1" : "=r"(v), "=m"(*p) : "0"(v) : "memory"); return v; } #define a_and a_and static inline void a_and(volatile int *p, int v) { - __asm__ __volatile__("lock ; and %1, %0" - : "=m"(*p) - : "r"(v) - : "memory"); + __asm__ __volatile__("lock ; and %1, %0" : "=m"(*p) : "r"(v) : "memory"); } #define a_or a_or @@ -82,10 +67,7 @@ static inline void a_dec(volatile int *p) #define a_store a_store static inline void a_store(volatile int *p, int x) { - __asm__ __volatile__("mov %1, %0 ; lock ; orl $0,(%%rsp)" - : "=m"(*p) - : "r"(x) - : "memory"); + __asm__ __volatile__("mov %1, %0 ; lock ; orl $0,(%%rsp)" : "=m"(*p) : "r"(x) : "memory"); } #define a_barrier a_barrier diff --git a/include/arch/x86_64/asm/bootparam.h b/include/arch/x86_64/asm/bootparam.h index ad10c79f..bc6e0879 100644 --- a/include/arch/x86_64/asm/bootparam.h +++ b/include/arch/x86_64/asm/bootparam.h @@ -155,12 +155,12 @@ struct boot_params { __u8 _pad6[1]; /* 0x1f0 */ struct setup_header hdr; /* setup header */ /* 0x1f1 */ __u8 _pad7[0x290 - 0x1f1 - sizeof(struct setup_header)]; - __u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX]; /* 0x290 */ + __u32 edd_mbr_sig_buffer[EDD_MBR_SIG_MAX]; /* 0x290 */ struct boot_e820_entry e820_table[E820_MAX_ENTRIES_ZEROPAGE]; /* 0x2d0 */ - __u8 _pad8[48]; /* 0xcd0 */ - struct edd_info eddbuf[EDDMAXNR]; /* 0xd00 */ - __u8 _pad9[276]; /* 0xeec */ + __u8 _pad8[48]; /* 0xcd0 */ + struct edd_info eddbuf[EDDMAXNR]; /* 0xd00 */ + __u8 _pad9[276]; /* 0xeec */ } __attribute__((packed)); /** diff --git a/include/arch/x86_64/asm/elf.h b/include/arch/x86_64/asm/elf.h index 3353eeb0..6bf01641 100644 --- a/include/arch/x86_64/asm/elf.h +++ b/include/arch/x86_64/asm/elf.h @@ -11,7 +11,6 @@ struct x86_xfeat_component { __u32 flags; } __attribute__((packed)); -_Static_assert(sizeof(struct x86_xfeat_component) % 4 == 0, - "x86_xfeat_component is not aligned"); +_Static_assert(sizeof(struct x86_xfeat_component) % 4 == 0, "x86_xfeat_component is not aligned"); #endif /* _ASM_X86_ELF_H */ diff --git a/include/arch/x86_64/asm/kvm.h b/include/arch/x86_64/asm/kvm.h index f37ee487..102869f4 100644 --- a/include/arch/x86_64/asm/kvm.h +++ b/include/arch/x86_64/asm/kvm.h @@ -205,10 +205,9 @@ struct kvm_msr_list { /* for KVM_X86_SET_MSR_FILTER */ struct kvm_msr_filter_range { -#define KVM_MSR_FILTER_READ (1 << 0) -#define KVM_MSR_FILTER_WRITE (1 << 1) -#define KVM_MSR_FILTER_RANGE_VALID_MASK \ - (KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE) +#define KVM_MSR_FILTER_READ (1 << 0) +#define KVM_MSR_FILTER_WRITE (1 << 1) +#define KVM_MSR_FILTER_RANGE_VALID_MASK (KVM_MSR_FILTER_READ | KVM_MSR_FILTER_WRITE) __u32 flags; __u32 nmsrs; /* number of msrs in bitmap */ __u32 base; /* MSR index the bitmap starts at */ @@ -412,8 +411,7 @@ struct kvm_xcrs { #define KVM_SYNC_X86_SREGS (1UL << 1) #define KVM_SYNC_X86_EVENTS (1UL << 2) -#define KVM_SYNC_X86_VALID_FIELDS \ - (KVM_SYNC_X86_REGS | KVM_SYNC_X86_SREGS | KVM_SYNC_X86_EVENTS) +#define KVM_SYNC_X86_VALID_FIELDS (KVM_SYNC_X86_REGS | KVM_SYNC_X86_SREGS | KVM_SYNC_X86_EVENTS) /* kvm_sync_regs struct included by kvm_run struct */ struct kvm_sync_regs { @@ -899,13 +897,11 @@ struct kvm_hyperv_eventfd { * 63:56 umask mask */ -#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \ - (((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | \ - (((mask) & 0xFFULL) << 56) | (((match) & 0xFFULL) << 8) | \ - ((__u64)(!!(exclude)) << 55)) +#define KVM_PMU_ENCODE_MASKED_ENTRY(event_select, mask, match, exclude) \ + (((event_select) & 0xFFULL) | (((event_select) & 0XF00ULL) << 24) | (((mask) & 0xFFULL) << 56) | \ + (((match) & 0xFFULL) << 8) | ((__u64)(!!(exclude)) << 55)) -#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT \ - (__GENMASK_ULL(7, 0) | __GENMASK_ULL(35, 32)) +#define KVM_PMU_MASKED_ENTRY_EVENT_SELECT (__GENMASK_ULL(7, 0) | __GENMASK_ULL(35, 32)) #define KVM_PMU_MASKED_ENTRY_UMASK_MASK (__GENMASK_ULL(63, 56)) #define KVM_PMU_MASKED_ENTRY_UMASK_MATCH (__GENMASK_ULL(15, 8)) #define KVM_PMU_MASKED_ENTRY_EXCLUDE (_BITULL(55)) diff --git a/include/arch/x86_64/asm/processor-flags.h b/include/arch/x86_64/asm/processor-flags.h index 02177c91..298ebe45 100644 --- a/include/arch/x86_64/asm/processor-flags.h +++ b/include/arch/x86_64/asm/processor-flags.h @@ -82,11 +82,9 @@ #define X86_CR3_PCID_BITS 12 #define X86_CR3_PCID_MASK (_AC((1UL << X86_CR3_PCID_BITS) - 1, UL)) -#define X86_CR3_LAM_U57_BIT \ - 61 /* Activate LAM for userspace, 62:57 bits masked */ -#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT) -#define X86_CR3_LAM_U48_BIT \ - 62 /* Activate LAM for userspace, 62:48 bits masked */ +#define X86_CR3_LAM_U57_BIT 61 /* Activate LAM for userspace, 62:57 bits masked */ +#define X86_CR3_LAM_U57 _BITULL(X86_CR3_LAM_U57_BIT) +#define X86_CR3_LAM_U48_BIT 62 /* Activate LAM for userspace, 62:48 bits masked */ #define X86_CR3_LAM_U48 _BITULL(X86_CR3_LAM_U48_BIT) #define X86_CR3_PCID_NOFLUSH_BIT 63 /* Preserve old PCID */ #define X86_CR3_PCID_NOFLUSH _BITULL(X86_CR3_PCID_NOFLUSH_BIT) @@ -176,8 +174,6 @@ #define CX86_ARR_BASE 0xc4 #define CX86_RCR_BASE 0xdc -#define CR0_STATE \ - (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | \ - X86_CR0_AM | X86_CR0_PG) +#define CR0_STATE (X86_CR0_PE | X86_CR0_MP | X86_CR0_ET | X86_CR0_NE | X86_CR0_WP | X86_CR0_AM | X86_CR0_PG) #endif /* _ASM_X86_PROCESSOR_FLAGS_H */ diff --git a/include/arch/x86_64/asm/sgx.h b/include/arch/x86_64/asm/sgx.h index 0fce30b3..e63c85ee 100644 --- a/include/arch/x86_64/asm/sgx.h +++ b/include/arch/x86_64/asm/sgx.h @@ -19,19 +19,14 @@ enum sgx_page_flags { #define SGX_MAGIC 0xA4 -#define SGX_IOC_ENCLAVE_CREATE _IOW(SGX_MAGIC, 0x00, struct sgx_enclave_create) -#define SGX_IOC_ENCLAVE_ADD_PAGES \ - _IOWR(SGX_MAGIC, 0x01, struct sgx_enclave_add_pages) -#define SGX_IOC_ENCLAVE_INIT _IOW(SGX_MAGIC, 0x02, struct sgx_enclave_init) -#define SGX_IOC_ENCLAVE_PROVISION \ - _IOW(SGX_MAGIC, 0x03, struct sgx_enclave_provision) -#define SGX_IOC_VEPC_REMOVE_ALL _IO(SGX_MAGIC, 0x04) -#define SGX_IOC_ENCLAVE_RESTRICT_PERMISSIONS \ - _IOWR(SGX_MAGIC, 0x05, struct sgx_enclave_restrict_permissions) -#define SGX_IOC_ENCLAVE_MODIFY_TYPES \ - _IOWR(SGX_MAGIC, 0x06, struct sgx_enclave_modify_types) -#define SGX_IOC_ENCLAVE_REMOVE_PAGES \ - _IOWR(SGX_MAGIC, 0x07, struct sgx_enclave_remove_pages) +#define SGX_IOC_ENCLAVE_CREATE _IOW(SGX_MAGIC, 0x00, struct sgx_enclave_create) +#define SGX_IOC_ENCLAVE_ADD_PAGES _IOWR(SGX_MAGIC, 0x01, struct sgx_enclave_add_pages) +#define SGX_IOC_ENCLAVE_INIT _IOW(SGX_MAGIC, 0x02, struct sgx_enclave_init) +#define SGX_IOC_ENCLAVE_PROVISION _IOW(SGX_MAGIC, 0x03, struct sgx_enclave_provision) +#define SGX_IOC_VEPC_REMOVE_ALL _IO(SGX_MAGIC, 0x04) +#define SGX_IOC_ENCLAVE_RESTRICT_PERMISSIONS _IOWR(SGX_MAGIC, 0x05, struct sgx_enclave_restrict_permissions) +#define SGX_IOC_ENCLAVE_MODIFY_TYPES _IOWR(SGX_MAGIC, 0x06, struct sgx_enclave_modify_types) +#define SGX_IOC_ENCLAVE_REMOVE_PAGES _IOWR(SGX_MAGIC, 0x07, struct sgx_enclave_remove_pages) /** * struct sgx_enclave_create - parameter structure for the @@ -150,8 +145,7 @@ struct sgx_enclave_run; * - <= 0: The given value is returned back to the caller. * - > 0: ENCLU function to invoke, either EENTER or ERESUME. */ -typedef int (*sgx_enclave_user_handler_t)(long rdi, long rsi, long rdx, - long rsp, long r8, long r9, +typedef int (*sgx_enclave_user_handler_t)(long rdi, long rsi, long rdx, long rsp, long r8, long r9, struct sgx_enclave_run *run); /** @@ -223,10 +217,7 @@ struct sgx_enclave_run { * - 0: ENCLU function was successfully executed. * - -EINVAL: Invalid ENCL number (neither EENTER nor ERESUME). */ -typedef int (*vdso_sgx_enter_enclave_t)(unsigned long rdi, unsigned long rsi, - unsigned long rdx, - unsigned int function, unsigned long r8, - unsigned long r9, - struct sgx_enclave_run *run); +typedef int (*vdso_sgx_enter_enclave_t)(unsigned long rdi, unsigned long rsi, unsigned long rdx, unsigned int function, + unsigned long r8, unsigned long r9, struct sgx_enclave_run *run); #endif /* _ASM_X86_SGX_H */ diff --git a/include/arch/x86_64/asm/svm.h b/include/arch/x86_64/asm/svm.h index 76c30970..1a72c7ef 100644 --- a/include/arch/x86_64/asm/svm.h +++ b/include/arch/x86_64/asm/svm.h @@ -131,102 +131,58 @@ #define SVM_EXIT_ERR -1 -#define SVM_EXIT_REASONS \ - { SVM_EXIT_READ_CR0, "read_cr0" }, { SVM_EXIT_READ_CR2, "read_cr2" }, \ - { SVM_EXIT_READ_CR3, "read_cr3" }, \ - { SVM_EXIT_READ_CR4, "read_cr4" }, \ - { SVM_EXIT_READ_CR8, "read_cr8" }, \ - { SVM_EXIT_WRITE_CR0, "write_cr0" }, \ - { SVM_EXIT_WRITE_CR2, "write_cr2" }, \ - { SVM_EXIT_WRITE_CR3, "write_cr3" }, \ - { SVM_EXIT_WRITE_CR4, "write_cr4" }, \ - { SVM_EXIT_WRITE_CR8, "write_cr8" }, \ - { SVM_EXIT_READ_DR0, "read_dr0" }, \ - { SVM_EXIT_READ_DR1, "read_dr1" }, \ - { SVM_EXIT_READ_DR2, "read_dr2" }, \ - { SVM_EXIT_READ_DR3, "read_dr3" }, \ - { SVM_EXIT_READ_DR4, "read_dr4" }, \ - { SVM_EXIT_READ_DR5, "read_dr5" }, \ - { SVM_EXIT_READ_DR6, "read_dr6" }, \ - { SVM_EXIT_READ_DR7, "read_dr7" }, \ - { SVM_EXIT_WRITE_DR0, "write_dr0" }, \ - { SVM_EXIT_WRITE_DR1, "write_dr1" }, \ - { SVM_EXIT_WRITE_DR2, "write_dr2" }, \ - { SVM_EXIT_WRITE_DR3, "write_dr3" }, \ - { SVM_EXIT_WRITE_DR4, "write_dr4" }, \ - { SVM_EXIT_WRITE_DR5, "write_dr5" }, \ - { SVM_EXIT_WRITE_DR6, "write_dr6" }, \ - { SVM_EXIT_WRITE_DR7, "write_dr7" }, \ - { SVM_EXIT_EXCP_BASE + DE_VECTOR, "DE excp" }, \ - { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, \ - { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \ - { SVM_EXIT_EXCP_BASE + OF_VECTOR, "OF excp" }, \ - { SVM_EXIT_EXCP_BASE + BR_VECTOR, "BR excp" }, \ - { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, \ - { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, \ - { SVM_EXIT_EXCP_BASE + DF_VECTOR, "DF excp" }, \ - { SVM_EXIT_EXCP_BASE + TS_VECTOR, "TS excp" }, \ - { SVM_EXIT_EXCP_BASE + NP_VECTOR, "NP excp" }, \ - { SVM_EXIT_EXCP_BASE + SS_VECTOR, "SS excp" }, \ - { SVM_EXIT_EXCP_BASE + GP_VECTOR, "GP excp" }, \ - { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, \ - { SVM_EXIT_EXCP_BASE + MF_VECTOR, "MF excp" }, \ - { SVM_EXIT_EXCP_BASE + AC_VECTOR, "AC excp" }, \ - { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, \ - { SVM_EXIT_EXCP_BASE + XM_VECTOR, "XF excp" }, \ - { SVM_EXIT_INTR, "interrupt" }, { SVM_EXIT_NMI, "nmi" }, \ - { SVM_EXIT_SMI, "smi" }, { SVM_EXIT_INIT, "init" }, \ - { SVM_EXIT_VINTR, "vintr" }, \ - { SVM_EXIT_CR0_SEL_WRITE, "cr0_sel_write" }, \ - { SVM_EXIT_IDTR_READ, "read_idtr" }, \ - { SVM_EXIT_GDTR_READ, "read_gdtr" }, \ - { SVM_EXIT_LDTR_READ, "read_ldtr" }, \ - { SVM_EXIT_TR_READ, "read_rt" }, \ - { SVM_EXIT_IDTR_WRITE, "write_idtr" }, \ - { SVM_EXIT_GDTR_WRITE, "write_gdtr" }, \ - { SVM_EXIT_LDTR_WRITE, "write_ldtr" }, \ - { SVM_EXIT_TR_WRITE, "write_rt" }, \ - { SVM_EXIT_RDTSC, "rdtsc" }, { SVM_EXIT_RDPMC, "rdpmc" }, \ - { SVM_EXIT_PUSHF, "pushf" }, { SVM_EXIT_POPF, "popf" }, \ - { SVM_EXIT_CPUID, "cpuid" }, { SVM_EXIT_RSM, "rsm" }, \ - { SVM_EXIT_IRET, "iret" }, { SVM_EXIT_SWINT, "swint" }, \ - { SVM_EXIT_INVD, "invd" }, { SVM_EXIT_PAUSE, "pause" }, \ - { SVM_EXIT_HLT, "hlt" }, { SVM_EXIT_INVLPG, "invlpg" }, \ - { SVM_EXIT_INVLPGA, "invlpga" }, { SVM_EXIT_IOIO, "io" }, \ - { SVM_EXIT_MSR, "msr" }, \ - { SVM_EXIT_TASK_SWITCH, "task_switch" }, \ - { SVM_EXIT_FERR_FREEZE, "ferr_freeze" }, \ - { SVM_EXIT_SHUTDOWN, "shutdown" }, \ - { SVM_EXIT_VMRUN, "vmrun" }, \ - { SVM_EXIT_VMMCALL, "hypercall" }, \ - { SVM_EXIT_VMLOAD, "vmload" }, { SVM_EXIT_VMSAVE, "vmsave" }, \ - { SVM_EXIT_STGI, "stgi" }, { SVM_EXIT_CLGI, "clgi" }, \ - { SVM_EXIT_SKINIT, "skinit" }, { SVM_EXIT_RDTSCP, "rdtscp" }, \ - { SVM_EXIT_ICEBP, "icebp" }, { SVM_EXIT_WBINVD, "wbinvd" }, \ - { SVM_EXIT_MONITOR, "monitor" }, { SVM_EXIT_MWAIT, "mwait" }, \ - { SVM_EXIT_XSETBV, "xsetbv" }, \ - { SVM_EXIT_EFER_WRITE_TRAP, "write_efer_trap" }, \ - { SVM_EXIT_CR0_WRITE_TRAP, "write_cr0_trap" }, \ - { SVM_EXIT_CR4_WRITE_TRAP, "write_cr4_trap" }, \ - { SVM_EXIT_CR8_WRITE_TRAP, "write_cr8_trap" }, \ - { SVM_EXIT_INVPCID, "invpcid" }, \ - { SVM_EXIT_BUS_LOCK, "buslock" }, \ - { SVM_EXIT_IDLE_HLT, "idle-halt" }, { SVM_EXIT_NPF, "npf" }, \ - { SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \ - { SVM_EXIT_AVIC_UNACCELERATED_ACCESS, \ - "avic_unaccelerated_access" }, \ - { SVM_EXIT_VMGEXIT, "vmgexit" }, \ - { SVM_VMGEXIT_MMIO_READ, "vmgexit_mmio_read" }, \ - { SVM_VMGEXIT_MMIO_WRITE, "vmgexit_mmio_write" }, \ - { SVM_VMGEXIT_NMI_COMPLETE, "vmgexit_nmi_complete" }, \ - { SVM_VMGEXIT_AP_HLT_LOOP, "vmgexit_ap_hlt_loop" }, \ - { SVM_VMGEXIT_AP_JUMP_TABLE, "vmgexit_ap_jump_table" }, \ - { SVM_VMGEXIT_PSC, "vmgexit_page_state_change" }, \ - { SVM_VMGEXIT_GUEST_REQUEST, "vmgexit_guest_request" }, \ - { SVM_VMGEXIT_EXT_GUEST_REQUEST, \ - "vmgexit_ext_guest_request" }, \ - { SVM_VMGEXIT_AP_CREATION, "vmgexit_ap_creation" }, \ - { SVM_VMGEXIT_HV_FEATURES, "vmgexit_hypervisor_feature" }, \ - { SVM_EXIT_ERR, "invalid_guest_state" } +#define SVM_EXIT_REASONS \ + { SVM_EXIT_READ_CR0, "read_cr0" }, { SVM_EXIT_READ_CR2, "read_cr2" }, { SVM_EXIT_READ_CR3, "read_cr3" }, \ + { SVM_EXIT_READ_CR4, "read_cr4" }, { SVM_EXIT_READ_CR8, "read_cr8" }, \ + { SVM_EXIT_WRITE_CR0, "write_cr0" }, { SVM_EXIT_WRITE_CR2, "write_cr2" }, \ + { SVM_EXIT_WRITE_CR3, "write_cr3" }, { SVM_EXIT_WRITE_CR4, "write_cr4" }, \ + { SVM_EXIT_WRITE_CR8, "write_cr8" }, { SVM_EXIT_READ_DR0, "read_dr0" }, \ + { SVM_EXIT_READ_DR1, "read_dr1" }, { SVM_EXIT_READ_DR2, "read_dr2" }, \ + { SVM_EXIT_READ_DR3, "read_dr3" }, { SVM_EXIT_READ_DR4, "read_dr4" }, \ + { SVM_EXIT_READ_DR5, "read_dr5" }, { SVM_EXIT_READ_DR6, "read_dr6" }, \ + { SVM_EXIT_READ_DR7, "read_dr7" }, { SVM_EXIT_WRITE_DR0, "write_dr0" }, \ + { SVM_EXIT_WRITE_DR1, "write_dr1" }, { SVM_EXIT_WRITE_DR2, "write_dr2" }, \ + { SVM_EXIT_WRITE_DR3, "write_dr3" }, { SVM_EXIT_WRITE_DR4, "write_dr4" }, \ + { SVM_EXIT_WRITE_DR5, "write_dr5" }, { SVM_EXIT_WRITE_DR6, "write_dr6" }, \ + { SVM_EXIT_WRITE_DR7, "write_dr7" }, { SVM_EXIT_EXCP_BASE + DE_VECTOR, "DE excp" }, \ + { SVM_EXIT_EXCP_BASE + DB_VECTOR, "DB excp" }, { SVM_EXIT_EXCP_BASE + BP_VECTOR, "BP excp" }, \ + { SVM_EXIT_EXCP_BASE + OF_VECTOR, "OF excp" }, { SVM_EXIT_EXCP_BASE + BR_VECTOR, "BR excp" }, \ + { SVM_EXIT_EXCP_BASE + UD_VECTOR, "UD excp" }, { SVM_EXIT_EXCP_BASE + NM_VECTOR, "NM excp" }, \ + { SVM_EXIT_EXCP_BASE + DF_VECTOR, "DF excp" }, { SVM_EXIT_EXCP_BASE + TS_VECTOR, "TS excp" }, \ + { SVM_EXIT_EXCP_BASE + NP_VECTOR, "NP excp" }, { SVM_EXIT_EXCP_BASE + SS_VECTOR, "SS excp" }, \ + { SVM_EXIT_EXCP_BASE + GP_VECTOR, "GP excp" }, { SVM_EXIT_EXCP_BASE + PF_VECTOR, "PF excp" }, \ + { SVM_EXIT_EXCP_BASE + MF_VECTOR, "MF excp" }, { SVM_EXIT_EXCP_BASE + AC_VECTOR, "AC excp" }, \ + { SVM_EXIT_EXCP_BASE + MC_VECTOR, "MC excp" }, { SVM_EXIT_EXCP_BASE + XM_VECTOR, "XF excp" }, \ + { SVM_EXIT_INTR, "interrupt" }, { SVM_EXIT_NMI, "nmi" }, { SVM_EXIT_SMI, "smi" }, \ + { SVM_EXIT_INIT, "init" }, { SVM_EXIT_VINTR, "vintr" }, { SVM_EXIT_CR0_SEL_WRITE, "cr0_sel_write" }, \ + { SVM_EXIT_IDTR_READ, "read_idtr" }, { SVM_EXIT_GDTR_READ, "read_gdtr" }, \ + { SVM_EXIT_LDTR_READ, "read_ldtr" }, { SVM_EXIT_TR_READ, "read_rt" }, \ + { SVM_EXIT_IDTR_WRITE, "write_idtr" }, { SVM_EXIT_GDTR_WRITE, "write_gdtr" }, \ + { SVM_EXIT_LDTR_WRITE, "write_ldtr" }, { SVM_EXIT_TR_WRITE, "write_rt" }, { SVM_EXIT_RDTSC, "rdtsc" }, \ + { SVM_EXIT_RDPMC, "rdpmc" }, { SVM_EXIT_PUSHF, "pushf" }, { SVM_EXIT_POPF, "popf" }, \ + { SVM_EXIT_CPUID, "cpuid" }, { SVM_EXIT_RSM, "rsm" }, { SVM_EXIT_IRET, "iret" }, \ + { SVM_EXIT_SWINT, "swint" }, { SVM_EXIT_INVD, "invd" }, { SVM_EXIT_PAUSE, "pause" }, \ + { SVM_EXIT_HLT, "hlt" }, { SVM_EXIT_INVLPG, "invlpg" }, { SVM_EXIT_INVLPGA, "invlpga" }, \ + { SVM_EXIT_IOIO, "io" }, { SVM_EXIT_MSR, "msr" }, { SVM_EXIT_TASK_SWITCH, "task_switch" }, \ + { SVM_EXIT_FERR_FREEZE, "ferr_freeze" }, { SVM_EXIT_SHUTDOWN, "shutdown" }, \ + { SVM_EXIT_VMRUN, "vmrun" }, { SVM_EXIT_VMMCALL, "hypercall" }, { SVM_EXIT_VMLOAD, "vmload" }, \ + { SVM_EXIT_VMSAVE, "vmsave" }, { SVM_EXIT_STGI, "stgi" }, { SVM_EXIT_CLGI, "clgi" }, \ + { SVM_EXIT_SKINIT, "skinit" }, { SVM_EXIT_RDTSCP, "rdtscp" }, { SVM_EXIT_ICEBP, "icebp" }, \ + { SVM_EXIT_WBINVD, "wbinvd" }, { SVM_EXIT_MONITOR, "monitor" }, { SVM_EXIT_MWAIT, "mwait" }, \ + { SVM_EXIT_XSETBV, "xsetbv" }, { SVM_EXIT_EFER_WRITE_TRAP, "write_efer_trap" }, \ + { SVM_EXIT_CR0_WRITE_TRAP, "write_cr0_trap" }, { SVM_EXIT_CR4_WRITE_TRAP, "write_cr4_trap" }, \ + { SVM_EXIT_CR8_WRITE_TRAP, "write_cr8_trap" }, { SVM_EXIT_INVPCID, "invpcid" }, \ + { SVM_EXIT_BUS_LOCK, "buslock" }, { SVM_EXIT_IDLE_HLT, "idle-halt" }, { SVM_EXIT_NPF, "npf" }, \ + { SVM_EXIT_AVIC_INCOMPLETE_IPI, "avic_incomplete_ipi" }, \ + { SVM_EXIT_AVIC_UNACCELERATED_ACCESS, "avic_unaccelerated_access" }, { SVM_EXIT_VMGEXIT, "vmgexit" }, \ + { SVM_VMGEXIT_MMIO_READ, "vmgexit_mmio_read" }, { SVM_VMGEXIT_MMIO_WRITE, "vmgexit_mmio_write" }, \ + { SVM_VMGEXIT_NMI_COMPLETE, "vmgexit_nmi_complete" }, \ + { SVM_VMGEXIT_AP_HLT_LOOP, "vmgexit_ap_hlt_loop" }, \ + { SVM_VMGEXIT_AP_JUMP_TABLE, "vmgexit_ap_jump_table" }, \ + { SVM_VMGEXIT_PSC, "vmgexit_page_state_change" }, \ + { SVM_VMGEXIT_GUEST_REQUEST, "vmgexit_guest_request" }, \ + { SVM_VMGEXIT_EXT_GUEST_REQUEST, "vmgexit_ext_guest_request" }, \ + { SVM_VMGEXIT_AP_CREATION, "vmgexit_ap_creation" }, \ + { SVM_VMGEXIT_HV_FEATURES, "vmgexit_hypervisor_feature" }, { SVM_EXIT_ERR, "invalid_guest_state" } #endif /* __SVM_H */ diff --git a/include/arch/x86_64/asm/swab.h b/include/arch/x86_64/asm/swab.h index 0324f00d..8707b4cd 100644 --- a/include/arch/x86_64/asm/swab.h +++ b/include/arch/x86_64/asm/swab.h @@ -22,9 +22,7 @@ static __inline__ __u64 __arch_swab64(__u64 val) __u64 u; } v; v.u = val; - __asm__("bswapl %0 ; bswapl %1 ; xchgl %0,%1" - : "=r"(v.s.a), "=r"(v.s.b) - : "0"(v.s.a), "1"(v.s.b)); + __asm__("bswapl %0 ; bswapl %1 ; xchgl %0,%1" : "=r"(v.s.a), "=r"(v.s.b) : "0"(v.s.a), "1"(v.s.b)); return v.u; #else /* __i386__ */ __asm__("bswapq %0" : "=r"(val) : "0"(val)); diff --git a/include/arch/x86_64/asm/vmx.h b/include/arch/x86_64/asm/vmx.h index 1c039c30..96d87c22 100644 --- a/include/arch/x86_64/asm/vmx.h +++ b/include/arch/x86_64/asm/vmx.h @@ -94,71 +94,42 @@ #define EXIT_REASON_NOTIFY 75 #define EXIT_REASON_TDCALL 77 -#define VMX_EXIT_REASONS \ - { EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, \ - { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" }, \ - { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" }, \ - { EXIT_REASON_INIT_SIGNAL, "INIT_SIGNAL" }, \ - { EXIT_REASON_SIPI_SIGNAL, "SIPI_SIGNAL" }, \ - { EXIT_REASON_INTERRUPT_WINDOW, "INTERRUPT_WINDOW" }, \ - { EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" }, \ - { EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" }, \ - { EXIT_REASON_CPUID, "CPUID" }, { EXIT_REASON_HLT, "HLT" }, \ - { EXIT_REASON_INVD, "INVD" }, \ - { EXIT_REASON_INVLPG, "INVLPG" }, \ - { EXIT_REASON_RDPMC, "RDPMC" }, \ - { EXIT_REASON_RDTSC, "RDTSC" }, \ - { EXIT_REASON_VMCALL, "VMCALL" }, \ - { EXIT_REASON_VMCLEAR, "VMCLEAR" }, \ - { EXIT_REASON_VMLAUNCH, "VMLAUNCH" }, \ - { EXIT_REASON_VMPTRLD, "VMPTRLD" }, \ - { EXIT_REASON_VMPTRST, "VMPTRST" }, \ - { EXIT_REASON_VMREAD, "VMREAD" }, \ - { EXIT_REASON_VMRESUME, "VMRESUME" }, \ - { EXIT_REASON_VMWRITE, "VMWRITE" }, \ - { EXIT_REASON_VMOFF, "VMOFF" }, { EXIT_REASON_VMON, "VMON" }, \ - { EXIT_REASON_CR_ACCESS, "CR_ACCESS" }, \ - { EXIT_REASON_DR_ACCESS, "DR_ACCESS" }, \ - { EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" }, \ - { EXIT_REASON_MSR_READ, "MSR_READ" }, \ - { EXIT_REASON_MSR_WRITE, "MSR_WRITE" }, \ - { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, \ - { EXIT_REASON_MSR_LOAD_FAIL, "MSR_LOAD_FAIL" }, \ - { EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" }, \ - { EXIT_REASON_MONITOR_TRAP_FLAG, "MONITOR_TRAP_FLAG" }, \ - { EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" }, \ - { EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" }, \ - { EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" }, \ - { EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" }, \ - { EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" }, \ - { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \ - { EXIT_REASON_GDTR_IDTR, "GDTR_IDTR" }, \ - { EXIT_REASON_LDTR_TR, "LDTR_TR" }, \ - { EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" }, \ - { EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" }, \ - { EXIT_REASON_INVEPT, "INVEPT" }, \ - { EXIT_REASON_RDTSCP, "RDTSCP" }, \ - { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }, \ - { EXIT_REASON_INVVPID, "INVVPID" }, \ - { EXIT_REASON_WBINVD, "WBINVD" }, \ - { EXIT_REASON_XSETBV, "XSETBV" }, \ - { EXIT_REASON_APIC_WRITE, "APIC_WRITE" }, \ - { EXIT_REASON_RDRAND, "RDRAND" }, \ - { EXIT_REASON_INVPCID, "INVPCID" }, \ - { EXIT_REASON_VMFUNC, "VMFUNC" }, \ - { EXIT_REASON_ENCLS, "ENCLS" }, \ - { EXIT_REASON_RDSEED, "RDSEED" }, \ - { EXIT_REASON_PML_FULL, "PML_FULL" }, \ - { EXIT_REASON_XSAVES, "XSAVES" }, \ - { EXIT_REASON_XRSTORS, "XRSTORS" }, \ - { EXIT_REASON_UMWAIT, "UMWAIT" }, \ - { EXIT_REASON_TPAUSE, "TPAUSE" }, \ - { EXIT_REASON_BUS_LOCK, "BUS_LOCK" }, \ - { EXIT_REASON_NOTIFY, "NOTIFY" }, \ +#define VMX_EXIT_REASONS \ + { EXIT_REASON_EXCEPTION_NMI, "EXCEPTION_NMI" }, { EXIT_REASON_EXTERNAL_INTERRUPT, "EXTERNAL_INTERRUPT" }, \ + { EXIT_REASON_TRIPLE_FAULT, "TRIPLE_FAULT" }, { EXIT_REASON_INIT_SIGNAL, "INIT_SIGNAL" }, \ + { EXIT_REASON_SIPI_SIGNAL, "SIPI_SIGNAL" }, { EXIT_REASON_INTERRUPT_WINDOW, "INTERRUPT_WINDOW" }, \ + { EXIT_REASON_NMI_WINDOW, "NMI_WINDOW" }, { EXIT_REASON_TASK_SWITCH, "TASK_SWITCH" }, \ + { EXIT_REASON_CPUID, "CPUID" }, { EXIT_REASON_HLT, "HLT" }, { EXIT_REASON_INVD, "INVD" }, \ + { EXIT_REASON_INVLPG, "INVLPG" }, { EXIT_REASON_RDPMC, "RDPMC" }, { EXIT_REASON_RDTSC, "RDTSC" }, \ + { EXIT_REASON_VMCALL, "VMCALL" }, { EXIT_REASON_VMCLEAR, "VMCLEAR" }, \ + { EXIT_REASON_VMLAUNCH, "VMLAUNCH" }, { EXIT_REASON_VMPTRLD, "VMPTRLD" }, \ + { EXIT_REASON_VMPTRST, "VMPTRST" }, { EXIT_REASON_VMREAD, "VMREAD" }, \ + { EXIT_REASON_VMRESUME, "VMRESUME" }, { EXIT_REASON_VMWRITE, "VMWRITE" }, \ + { EXIT_REASON_VMOFF, "VMOFF" }, { EXIT_REASON_VMON, "VMON" }, { EXIT_REASON_CR_ACCESS, "CR_ACCESS" }, \ + { EXIT_REASON_DR_ACCESS, "DR_ACCESS" }, { EXIT_REASON_IO_INSTRUCTION, "IO_INSTRUCTION" }, \ + { EXIT_REASON_MSR_READ, "MSR_READ" }, { EXIT_REASON_MSR_WRITE, "MSR_WRITE" }, \ + { EXIT_REASON_INVALID_STATE, "INVALID_STATE" }, { EXIT_REASON_MSR_LOAD_FAIL, "MSR_LOAD_FAIL" }, \ + { EXIT_REASON_MWAIT_INSTRUCTION, "MWAIT_INSTRUCTION" }, \ + { EXIT_REASON_MONITOR_TRAP_FLAG, "MONITOR_TRAP_FLAG" }, \ + { EXIT_REASON_MONITOR_INSTRUCTION, "MONITOR_INSTRUCTION" }, \ + { EXIT_REASON_PAUSE_INSTRUCTION, "PAUSE_INSTRUCTION" }, \ + { EXIT_REASON_MCE_DURING_VMENTRY, "MCE_DURING_VMENTRY" }, \ + { EXIT_REASON_TPR_BELOW_THRESHOLD, "TPR_BELOW_THRESHOLD" }, \ + { EXIT_REASON_APIC_ACCESS, "APIC_ACCESS" }, { EXIT_REASON_EOI_INDUCED, "EOI_INDUCED" }, \ + { EXIT_REASON_GDTR_IDTR, "GDTR_IDTR" }, { EXIT_REASON_LDTR_TR, "LDTR_TR" }, \ + { EXIT_REASON_EPT_VIOLATION, "EPT_VIOLATION" }, { EXIT_REASON_EPT_MISCONFIG, "EPT_MISCONFIG" }, \ + { EXIT_REASON_INVEPT, "INVEPT" }, { EXIT_REASON_RDTSCP, "RDTSCP" }, \ + { EXIT_REASON_PREEMPTION_TIMER, "PREEMPTION_TIMER" }, { EXIT_REASON_INVVPID, "INVVPID" }, \ + { EXIT_REASON_WBINVD, "WBINVD" }, { EXIT_REASON_XSETBV, "XSETBV" }, \ + { EXIT_REASON_APIC_WRITE, "APIC_WRITE" }, { EXIT_REASON_RDRAND, "RDRAND" }, \ + { EXIT_REASON_INVPCID, "INVPCID" }, { EXIT_REASON_VMFUNC, "VMFUNC" }, { EXIT_REASON_ENCLS, "ENCLS" }, \ + { EXIT_REASON_RDSEED, "RDSEED" }, { EXIT_REASON_PML_FULL, "PML_FULL" }, \ + { EXIT_REASON_XSAVES, "XSAVES" }, { EXIT_REASON_XRSTORS, "XRSTORS" }, \ + { EXIT_REASON_UMWAIT, "UMWAIT" }, { EXIT_REASON_TPAUSE, "TPAUSE" }, \ + { EXIT_REASON_BUS_LOCK, "BUS_LOCK" }, { EXIT_REASON_NOTIFY, "NOTIFY" }, \ { EXIT_REASON_TDCALL, "TDCALL" } -#define VMX_EXIT_REASON_FLAGS \ - { VMX_EXIT_REASONS_FAILED_VMENTRY, "FAILED_VMENTRY" } +#define VMX_EXIT_REASON_FLAGS { VMX_EXIT_REASONS_FAILED_VMENTRY, "FAILED_VMENTRY" } #define VMX_ABORT_SAVE_GUEST_MSR_FAIL 1 #define VMX_ABORT_LOAD_HOST_PDPTE_FAIL 2 |