diff options
| author | Kacper <kacper@mail.openlinux.dev> | 2025-12-09 19:20:15 +0100 |
|---|---|---|
| committer | Kacper <kacper@mail.openlinux.dev> | 2025-12-09 19:20:15 +0100 |
| commit | 885f5974cdf65b59415837ae97f5a14ef1350670 (patch) | |
| tree | 66ac13de29c7f4932c5fcae11773df574e4e256a /include/arch/x86_64/linux/serial_reg.h | |
| parent | 8f9e448b2ef6db7cd905540c21f3c5b190e7a1e7 (diff) | |
feat: add gzip and new headers
Diffstat (limited to 'include/arch/x86_64/linux/serial_reg.h')
| -rw-r--r-- | include/arch/x86_64/linux/serial_reg.h | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/include/arch/x86_64/linux/serial_reg.h b/include/arch/x86_64/linux/serial_reg.h index 0740d860..981d703b 100644 --- a/include/arch/x86_64/linux/serial_reg.h +++ b/include/arch/x86_64/linux/serial_reg.h @@ -300,14 +300,16 @@ #define UART_RSA_MSR ((UART_RSA_BASE) + 0) /* I/O: Mode Select Register */ -#define UART_RSA_MSR_SWAP (1 << 0) /* Swap low/high 8 bytes in I/O port addr \ +#define UART_RSA_MSR_SWAP \ + (1 << 0) /* Swap low/high 8 bytes in I/O port addr \ */ #define UART_RSA_MSR_FIFO (1 << 2) /* Enable the external FIFO */ #define UART_RSA_MSR_FLOW (1 << 3) /* Enable the auto RTS/CTS flow control */ #define UART_RSA_MSR_ITYP (1 << 4) /* Level (1) / Edge triger (0) */ -#define UART_RSA_IER ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register \ - */ +#define UART_RSA_IER \ + ((UART_RSA_BASE) + 1) /* I/O: Interrupt Enable Register \ + */ #define UART_RSA_IER_Rx_FIFO_H (1 << 0) /* Enable Rx FIFO half full int. */ #define UART_RSA_IER_Tx_FIFO_H (1 << 1) /* Enable Tx FIFO half full int. */ |